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atmel ATA6870 - description of evaluation board and control software li-ion/nimh battery stack measurement and monitoring kit with atmel ATA6870 1. introduction this document provides a descript ion and details on using the atmel ? ATA6870 eval- uation board for li-ion/nimh battery management applications. the evaluation kit consists of two boards: ? evaluation board with atmel ATA6870 and external mosfets for charge balancing ? controller board with the atmel microcontroller atmega128 for a comfortable control of the evaluation board, a graphical user interface is available. atmel ATA6870 description of evaluation board application note 9162d?auto?12/10
2 9162d?auto?12/10 atmel ATA6870 description of evaluation board 2. evaluation system figure 2-1. evaluation concept irq clk cell 1: reference adc cell b a l a ncing cell 6: reference adc cell b a l a ncing cell temper a t u re me asu ring mbat2 tempv ss ntc ntc av ss at s t c s _fu s e s canmode mfir s t dt s t vddfu s e vddhv avdd pow_ena vddhvm vddhvp pd_n temp2 mbat1 mbat7 mbat6 di s ch1 di s ch6 s ck mo s i mi s o c s _n irq_in clk_out c s _n_out s ck_out mo s i_out mi s o_in dvdd temp1 tempref gnd dv ss interchip a nd microcontroller comm u nic a tion interf a ce 3 . 3 v volt a ge reg u l a tor 3 . 3 v intern a l volt a ge reg u l a tor digit a l level s hifter te s t logic digit a l level s hifter digit a l level s hifter intern a l bi as ing to ata 6 8 70 ab ove bia s re s s t a nd b y control pwt s t ev a l ua tion bo a rd with ata 6 8 70 controller bo a rd atmeg a 12 8 s eri a l port u s b to s eri a l converter pc-gui
3 9162d?auto?12/10 atmel ATA6870 description of evaluation board the atmel ? ATA6870 is designed for the measurem ent and monitoring of li-ion and nimh multicell battery stacks in hy brid electrical vehicles. battery cell voltage and battery cell temperature are monitored in parallel by the related 12-bit adc. the circuit also provides charge balancing ca pability for each battery cell by controlling the external discharge n-channel mosfets. to supply power to a microcontroller or other external components, a linear regulator is inte- grated in atmel ATA6870. levelshifters with current sources ensure a reliable communication between stacked ics. three to six battery cells can be connected to the atmel ATA6870 and up to 16 ics can be cascaded to one chain. the atmel ATA6870 evaluation board is controlled by the atmel atmega128 controller board via a graphical user interface (gui), see figure 2-1 on page 2 . a usb to serial converter is provided, in case a serial port is not available on the pc. 2.1 system start to run the evaluation system, the following installation steps are necessary. 2.1.1 hardware installation ? connect the atmel ATA6870 evaluation board to the controller board at the pin header connectors x1 and x5 ? apply a 12v power supply to the x3 controller board connector --> the lit red led indicates the enabled status of the evaluation board ? connect the battery cell stack to be measured or the enclosed emulator (see document ?battery_emulator_ATA6870_71_v11.pdf?) to the green screw connectors on the evaluation board, see figure 2-3 on page 4 . ? in case of emulator use, apply a 48v power supply to the j22 power jack of the atmel emulator board ATA6870-dk2. ? to control the evaluation board via graphical user interface, connect to the pc by serial interface, respectively usb to serial conver ter to the serial connector of the controller board. a ?digitus? usb to serial converter is included in the evaluation kit. figure 2-2. assigned usb serial port
4 9162d?auto?12/10 atmel ATA6870 description of evaluation board 2.1.2 software installation 2.1.2.1 usb to serial converter ? install the corresponding driver software from the usb driver cd, enclosed with the usb to serial dongle. attention: don't let windows ? automatically install the driver. ? check the assigned usb serial port number from the windo ws system device manager, see figure 2-2 on page 3 . ? set the assigned com port number in the ?standard user? panel (upper right corner), as described in figure 4-1 on page 12 , as soon the graphical user interface is installed and running. 2.1.2.2 graphical user interface (gui) ? copy the folder ?ATA6870 battery monitor installer+exe? to a local drive on the pc ? execute the ?setup.exe? file to install all necessary support files ? execute the file ?ATA6870 battery monitor.exe? to run the graphical user interface (gui) 2.1.3 communication check to see whether the communication between pc and controller board is established or not, toggle the power down button pdn on the ?standard user? panel ( figure 4-1 on page 12 ). a proper communication exists when the red led ( figure 3-2 on page 6 ) on the evaluation board switches on/off. figure 2-3. evaluation setup
5 9162d?auto?12/10 atmel ATA6870 description of evaluation board 3. application board 3.1 controller board figure 3-1. controller board 3.1.1 on-board features the controller board provides the following items: ?atmel ? atmega128 qfn64 9x9 mm ?8-bit avr ? microcontroller ? 16-mhz system clock ? vcc regulator for 3.3v operation ? connectors ? pinheader interface x1 and x5 to atmel ATA6870 evaluation board ? 6-pin isp connector for in-system programming using jtagicemkii ? serial connector for pc communication ? supply connector
6 9162d?auto?12/10 atmel ATA6870 description of evaluation board 3.2 evaluation board figure 3-2. evaluation board with 3 stacked atmel ? ATA6870 3.2.1 on-board features the evaluation board provides the following items: ? atmel ATA6870 qfn 7x7 mm ? 12-bit battery cell voltage measurement ? simultaneous battery cells measurement in parallel ? charge balancing capability ? cell temperature measurement ? undervoltage detection ? integrated power supply for mcu ? reliable communication between stacked ics ? 18 external n-channel mosfets for balancing of battery cells ? on-board potentiometers as temperature emulation
7 9162d?auto?12/10 atmel ATA6870 description of evaluation board ? connectors ? pin header interface x1 and x5 to controller board ? screw connectors for connecting up to 18 battery cells ? 16-pin connector for stacking several evaluation boards 3.2.2 board configuration for 3 ic operation the evaluation board is assembled with 3 stacked devices of atmel ? ATA6870. the configura- tion regarding jumpers (j), optocouplers (o) and resistors (r) is as follows: figure 3-3. configuration for 3 ic operation atmel ATA6870
8 9162d?auto?12/10 atmel ATA6870 description of evaluation board 3.2.2.1 board definition master/slave since several evaluation boards can be stacked to a string, the respective board has to be configured as master or slave. single boards are configured as master board. default: pd_n_out connected to gnd (first) by jumper j20 3.2.2.2 first device the lowest device in a string is defined by mfirst jumper j23. default: set to first to pull up the mcu input pins miso and irq on mcu high level, the vdd_pull jumper j27 has to be on, if no external vdd_mcu supply is available. default: j27 is off, when evaluation board is operated together with controller board. 3.2.2.3 termination for the highest ic of the stack, the lines irq_in, clk_out, cs_n_out, sck_out,mosi_out, miso_in and vddhvp need to be terminated. --> by default the jumpers j18, 19, 21, 22, 24-26 are set 3.2.2.4 power down/enable the enable/disable of the 3 atmel ? ATA6870 on the evaluation board is executed by an optocoupler. only the highest ic in the application needs to be switched on/off. the lower ics are enabled/disabled via daisy chain. --> only optocoupler o2 is populated on the evaluation board by default, the gnd connection of the optocoupl er is set by jumper j31 (pd_n_opto_gnd to gnd). the evaluation board is automatically enabled by the controller board pin ?pd_n_opto_hi? of the x5 board interface connector. 3.2.2.5 temperature measurement ic1 configuration - by default, the potentiometers r93 and r94 are populated at the tempera- ture measuring inputs temp1 and temp2 to emulate the battery cell temperature, sensed by ntc1 and ntc2. optional ntc resistors can be installed at the jumpers j51and j52. ic2 configuration - a 3k3 voltage divider is realized at the inputs temp1 and temp2. optional ntc resistors can be installed at the jumpers j4 and j5. in that case, the default 3k3 resistors r78 and r82 have to be removed. ic3 configuration - a 3k3 voltage divider is realized at the inputs temp1 and temp2. optional ntc resistors can be installed at the jumpers j16 and j17. in that case, the default 3k3 resis- tors r52 and r56 have to be removed.
9 9162d?auto?12/10 atmel ATA6870 description of evaluation board 3.2.2.6 integrated voltage regulator to supply external components, e.g. mcu, an in ternal 3.3v voltage regulator is implemented in atmel ? ATA6870. for the regulator activation, the pow_ena jumpers j3, j14 and 15 have to be set to on. the regulator voltage is available at pin ?vddhvm? of the lowest stack ic. default: pow_ena jumpers j3, j14 and j15 set to off 3.2.2.7 battery cell connection the battery stack connection to the atmel ? ATA6870 evaluation board has to be done in the described way: ic1 cells: connect the first 6 battery cells between clamp 1 and 7 of the lower connector to ic1. ic2 cells: connect the second 6 battery cell s between clamp 1 and 7 of the middle connector to ic2. ic3 cells: connect the third 6 battery cells between clamp 1 and 7 of the upper connector to ic3. clamp 7 of the first connector and clamp 1 of the second connector are connected together on the board, clamp 7 of the second connector and clamp 1 of the third connector as well. 3.2.2.8 charge balancing for each ic on the evaluation board, 6 external n-channel mosfets are populated to support the charge balancing of the connected battery cells, see figure 3-2 on page 6 . the activation of the respective mosfet is controlled via the gui, see figure 4-2 on page 13 . the populated 1k discharge resistors are in a 0603 package. the footprint of the resistors allows the use of resistors with higher power dissipation and package size up to 2512.
10 9162d?auto?12/10 atmel ATA6870 description of evaluation board 3.2.3 board configuration for 2 ic operation - 12 battery cells to operate the evaluation board with only two ATA6870, modifications regarding termination and optocoupler have to be done (see figure 3-4 ). ? remove termination jumpers j18, j19, j21, j22, j24, j25, j26 from the 3 ic configuration ? remove optocoupler o2 or resistor r51 ? populate termination jumpers j6 , j7, j8, j9, j1 0, j11, j12 ? populate optocoupler o4 and resistor r77 (330 ) ? connect the battery cells or an appropriate battery emulator to the two lower cell connectors of the board (see figure 3-4 ). figure 3-4. configuration for 2 ic (12 cell) operation atmel ? ATA6870
11 9162d?auto?12/10 atmel ATA6870 description of evaluation board 3.2.4 board configuration for 1 ic operation - 6 battery cells to operate the evaluation board with only one atmel ? ATA6870, modifications regarding ter- mination and optocoupler have to be done (see figure 3-5 ). ? remove termination jumpers j18, j19, j21, j22, j24, j25, j26 ? remove optocoupler o2 or resistor r51 ? populate termination jumpers j33, j35, j36, j37, j38, j40, j50 ? populate optocoupler o1 and resistor r96 (330 ) ? connect the battery cells or an appropriate battery emulator to the lowest connector of the board (see figure 3-5 ) figure 3-5. configuration for 1 ic (6cell) operation atmel ? ATA6870
12 9162d?auto?12/10 atmel ATA6870 description of evaluation board 4. software description to verify the functions of the application board, a graphical user face is provided. after the hardware setup and software installation, the gui is started by executing the ?ATA6870 battery monitor.exe? file. 4.1 standard user with the ?standard user? panel, the main functions of atmel ? ATA6870 can be tested. figure 4-1. standard user control panel 4.1.1 com box the usb to serial port number of the pc is selected 4.1.2 pdn the power-down button disables/enables the ics on the evaluation board. 4.1.3 select the data acquisition of chip1, chip2 or chip3 of the evaluation board can be selected. in addition, the data of all chips can be acquired by selecting ?chip1?3? 4.1.4 acquire the measurement data of the selected chips are acquired.
13 9162d?auto?12/10 atmel ATA6870 description of evaluation board 4.1.5 draw the draw buttons select the chip, which measurement results are displayed on the screen, in case of ?chip1?3? is selected. otherwise the measurement results of selected chip is dis- played automatically. 4.1.6 measure the data can be acquired as single shot or in a permanent loop. in loop case, the measure- ment results are continuously drawn on the screen, see figure 4-2 . figure 4-2. standard user panel with loop acquisition 4.1.7 discharge the discharge buttons activate the on board n- channel mosfet transistors for charge bal- ancing of the corresponding battery cell, see figure 4-3 on page 14 . on the standard user panel the discharge function for 3 ics (18 battery cells) is provided. on the ?acquire data window? (see figure 4-5 on page 16 ), which can be activated on the ?standard user? and ?advanced user? panel, the disc harge matrix of up to 72 battery cells (12 ics) is available for a stacked board configuration. 4.1.8 loop the loop time for the acquisition cycles can be set. 4.1.9 overvoltage a threshold can be defined to detect an overvoltage of the connected battery cells.
14 9162d?auto?12/10 atmel ATA6870 description of evaluation board 4.1.10 undervoltage a threshold can be defined to detect an undervoltage of the connected battery cells. 4.1.11 cell states the cell status of each connected battery cell is displayed for all chips. if an over- or undervolt- age of a battery cell is detected, the corresponding cell color on the panel will change, see figure 4-3 . ? green cell: battery cell voltage in the defined voltage range ? red cell: battery cell voltage exceeds the undervoltage limit ? yellow cell: battery cell voltage exceeds the overvoltage limit figure 4-3. standard user panel with over- and undervoltage detection 4.1.12 data logging to save the measurement values of the monitored battery cells, a log file can be generated. the data logging is enabled/disabled by th e toggle menu data logging/don't log data. the log file path can be written directly into the text box or set by a browser window, enabled by pushing the folder symbol. a format selection of csv (comma separated variable) or tab limited format of the saved data is available.
15 9162d?auto?12/10 atmel ATA6870 description of evaluation board figure 4-4. data log file generation the data log file generation for up to 72 battery cells (12 ics) is available on the ?acquire data window? (see figure 4-5 on page 16 ), which can be activated on the ?standard user? and ?advanced user? panel. 4.1.13 clear graph clears all displayed graphs from the window. 4.1.14 stop all acquisitions are stopped. a second press of the stop button will halt the software, ready for closing. 4.1.15 acquire data window by pushing the acquire data window button a new panel appears on the screen (see figure 4-5 on page 16 ). the measurement values of up to 72 battery cells are displayed (12 ics with 6 cells per ic). the chip(s) acquire window shows the selected number of ics to be measured in multi chip mode. the number can be inserted directly, or set by the provided slide bar. in single chip mode, only the cell values of the one selected ic are checked. for both, single chip and multi chip mode, the data logging function is provided. also the discharge function of up to 72 battery cells is available by the discharge chip/cell matrix . the data acquisition can be operated in once and loop mode. if the loop mode is running, press once to stop the continuous data acquisition.
16 9162d?auto?12/10 atmel ATA6870 description of evaluation board figure 4-5. acquire data window
17 9162d?auto?12/10 atmel ATA6870 description of evaluation board 4.2 advanced user for a more individual and detailed control of the evaluation system, the ?advanced user? panel is provided. single register can be controlled, and saved command files can be executed. figure 4-6. advanced user panel four command panels are at the user?s disposal . all of these are suitable to configure and execute commands. by default, the executed commands are displayed in the ?standard? panel. command files can be saved, respectively loaded to/from a folder by using the corresponding load and save buttons. the execute button starts the command transfer. a list box is provided to display the decimal adc values of the acquired data for each battery cell of the selected ic. the decimal adc values are available for v(mbati+1), gain and offset. the calculated cell volt age vbatp is also displayed in this list box. to achieve a correct data transfer with the respective register, 5 read/write commands are available: ? read/write8bit - read/write operation with all 8 bit registers ? read/write16bit - read/write operation with all 16 bit registers ? burst_read - reads back all channel values (6 voltage + 1 temperature) a register is addressed by selecting chip number ( chip ) and address ( addr ). update spi transfers the inserted data .
18 9162d?auto?12/10 atmel ATA6870 description of evaluation board 4.2.1 mosi/miso the transfer addresses and data are displayed for the respective write/read execution. 4.2.2 clk on the toggle button enables/disables system clock 4.2.3 softrstn resets atmel ? ATA6870 software. 4.2.4 default sets the controller board into default conditions. 4.2.5 clk the system clock frequency is set. 4.2.6 spi-clock the frequency of the serial data transfer is set. 4.2.7 step mode to execute a command stack in single steps, a step mode is provided, see figure 4-7 . the step button executes a single step , an auto once or an auto loop operation. command panel 1 to panel 4 ( tab1 to tab4 ) or a saved file represent the source for the step mode operation. the time interval between two steps is adjustable by the wait timer.
19 9162d?auto?12/10 atmel ATA6870 description of evaluation board figure 4-7. step mode
20 9162d?auto?12/10 atmel ATA6870 description of evaluation board 5. board schematics and layout 5.1 schematic of 3 stacked atmel ATA6870 figure 5-1. schematic of atmel ? evaluation board ATA6870
21 9162d?auto?12/10 atmel ATA6870 description of evaluation board 5.2 interfaces to controll er board and additional stacked evaluation boards figure 5-2. interfaces of the atmel ? ATA6870 evaluation board pd_n_opto_l0 gnd_ 3 v ss a_ 3 clk_out_ 3 s ck_out_ 3 mi s o_in_ 3 pd_n_ 3 vdd_hup_ 3 irq_in_ 3 c s n_out_ 3 mo s i_out_ 3 s t1 wan_16 vdd_mcu pd_n_opto_hi clk irq mi s o mo s i s ck c s _n gnd_0 clk vdd_hum 1 1 2 3 4 5 6 7 8 9 10 11 12 1 3 14 15 16 1 3 5 7 9 11 1 3 15 2 4 6 8 10 12 14 16 pd_n_opto_lo gnd_0 v ss a_0 clk s ck mi s o pd_n_out vdd_hum irq c s _n mo s i s t2 wan_16 1 3 5 7 9 11 1 3 15 2 4 6 8 10 12 14 16 17 1 8 19 20 21 22 2 3 24 1 2 3 4 5 6 7 8 9 10 11 12 1 3 14 15 16 17 1 8 19 20 21 22 2 3 24 x1 ma24-1-cat x5 ma24-1-cat avr board x1 avr board x5 to upper bm s board to lower bm s board pd_n_opto_hi pd_n_opto_hi
22 9162d?auto?12/10 atmel ATA6870 description of evaluation board 5.3 evaluation board layout and component placement figure 5-3. component placement and layout top view
23 9162d?auto?12/10 atmel ATA6870 description of evaluation board figure 5-4. board layout bottom view
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